Custom Firmware Development for a 75T PCIe FPGA/DMA Card

I am looking for an experienced FPGA/PCIe developer to build custom firmware for my existing **75T PCIe FPGA/DMA card**. The card will be used in dedicated AMD test systems for PCIe, DMA, and Windows device compatibility research.

## Project Objective

I need a stable, well-documented PCIe endpoint with working DMA functionality. The implementation should include:

* Correct PCIe configuration space and capability structures
* Functional BARs with a documented register map
* PCIe TLP handling
* Host-to-device and device-to-host communication
* Controlled DMA reads and writes
* MSI or MSI-X interrupts, where supported by the board
* Reliable initialization, reset, and recovery
* Diagnostic logging and test utilities
* Windows 10/11 device enumeration and driver interaction

DMA tests should be configurable and limited to approved memory ranges where practical.

## Platform Compatibility

The card and any required driver should be tested on agreed AMD systems with the following host security features enabled:

* IOMMU / AMD-Vi
* Windows HVCI / Memory Integrity
* Secure Boot
* TPM 2.0

The mainboard being used is **B650 EAGLE AX**, along with compatible AMD GPU and CPU components. I can also provide photos of the **75T PCIe FPGA/DMA card**, which is likely a Captain rebrand.

These are host platform features. I need the developer to document how each setting affects enumeration, driver loading, DMA operation, and overall stability. If a Windows driver is required, please specify its signing requirements and any compatibility limitations.

## Diagnostics and Validation

Please test the implementation with standard PCIe and Windows diagnostic tools, including **DRV Scan**, and document the results. Any reported issue should include an explanation of its likely technical cause and the steps needed to reproduce it.

The completed project should demonstrate clean enumeration, working BAR communication, controlled DMA read/write tests, interrupt handling, and stable operation on the agreed hardware.

## Deliverables
1. Complete FPGA source and project files
2. Reproducible build configuration
3. Flash-ready bitstream for my exact 75T board
4. Required host utilities and driver components
5. Build, flashing, and recovery instructions
6. PCIe configuration-space and BAR/register documentation
7. DMA, interrupt, and TLP architecture documentation
8. Test results for Windows, DRV Scan, and each agreed platform security setting
9. Known limitations and troubleshooting instructions
10. The FPGA endpoint should functionally emulate a specific existing LAN or audio card so that its unmodified Windows driver can recognize and operate the device. This includes matching the reference card’s PCIe interface, BAR registers, initialization, interrupts, and driver-visible responses; the exact reference model will be agreed before development.
11. Developers must have strong knowledge of Windows kernel development as well as expertise in creating firmware with precise 1:1 CFG implementation.

Please include examples of previous FPGA/PCIe work, the FPGA families and toolchains you have used, your estimated price, and a development timeline. I can provide the exact board model, FPGA chip, current firmware details, GPU/CPU specifications of my system setup (AMD), as well as photos of the **75T Captain rebrand** card.